e/Multi-threshold CMOS

Information
has gloss	eng: Multi-threshold CMOS (MTCMOS) utilized transistors with multiple threshold voltages (Vt) to optimize delay or power. Lower voltage devices are used on critical delay paths to minimize clock periods. Higher voltage devices are used on non-critical paths to reduce static leakage power without incurring a delay penalty. Typical high voltage devices reduce static leakage by 10 times compared with low voltage devices. One method of creating devices with multiple threshold voltages is to apply different bias voltages (Vb) to the base or bulk terminal of transistors, the other way can be "gate engineering". In MOSFET devices, lower bias voltages will increase voltages, increase delay, and reduce static leakage.
lexicalization	eng: Multi-threshold CMOS
instance of	e/Logic family